I. INTRODUCTION
Analog phase shifters using CPW lines with distributed
MEMS bridges have recently demonstrated broadband
characteristics with low loss of 4.0 dB / 360º at 60 GHz [1].
However, since there was a limit on the control range of
the bridge height before the bridge snaps, the analog
phase shifter showed relatively small phase shift. This
problem was solved by operating the MEMS bridges in the
digital mode [2]- [8], where two distinct capacitance states
(on : bridge snapped and off : bridge as is) were defined
with a high Con/Coff ratio. Digital phase shifters with this
approach allow large phase shift and low sensitivity to
electrical noise. In the published CPW digital phase
shifters [2], [3], a small MIM (metal -insulator-metal)
capacitor in series with the MEMS bridge capacitor was
used to reduce the total shunt capacitance seen by the line,
resulting in an acceptable return loss for both switching
states over a wide band. Here, the biasing to the MEMS
TABLE I
Comparison of loss and pull-down voltage for several
MEMS phase shifters.
capacitor was applied through these two series capacitors,
resulting in high actuation bias voltages in excess of 40 V.
If this approach were to be applied at higher frequencies
such as V -band, the bias voltage would be too high to be
practical. This is due to the fact that the required MEMS
shunt capacitance of the CPW lines decreases as
frequency increases, making the switching voltage even
higher. Moreover, the loss of the loaded CPW line will
increase because of the low Q of the MIM capacitor at
high frequencies [3]. The goal of this work was to realize a
distributed CPW digital phase shifter with low loss and
reasonable actuation voltage at V -band. In order to
minimize the loss at V-band, MAM (metal -air-metal)
capacitors in series with MEMS capacitor were used for
the shunt capacitors. The low capacitance per unit area
and high Q -factor of the MAM capacitors make MAM
capacitors better suited to V-band applications than MIM
capacitors. MAM structures have previously been
successfully employed to demonstrate the low-loss
compact filters by the authors [9]. Also, to our knowledge,
Hayden will present a low-loss distributed MEMS phase
shifter at Ka-band using similar MAM approach [10].
In addition to the low-loss capability made possible by
the MAM capacitors, the bias voltage was also reduced in
this work by employing choke spiral inductors in the bias
circuit. In this way, the bias could be directly applied to the
MEMS capacitors, bypassing the series MAM capacitors.
The measured loss and operation voltage for several
MEMS phase shifters at various bands are compared with
those of this work in Table I. To the best of our knowledge,
this is the first demonstration of the low-loss broadband
digital MEMS phase shifters at V-band.
II. DESIGN AND FABRICATION
The 2-bit MEMS distributed phase shifter of this work
consists of a high impedance CPW line (Z0 = 96 W, width =
100 mm, gap = 120 mm) capacitively loaded by the periodic
placement [2], [3] of a series connected MEMS bridges and
MAM capacitors. The unit cell of the phase shifter is
shown in Fig.1 together with the equivalent circuit model.
In this design, the range of the characteristic impedances
was first chosen to be from 46 to 59 W to guarantee good
impedance matching (S11, S22 < -13 dB) up to 75 GHz. This
requires overall Con /Coff ratio of 1.6 (40 / 25 fF) seen by the
line. The length of the unit cell is 262 mm. A 262 mm-long 96
W line was modeled with a shunt capacitance (Ct) of 5 fF,
series inductance (Lt) of 104 pH. The loaded capacitance
seen by the line is the series combination of the MEMS
bridge capacitance (Cb) and total MAM capacitance (Cs).
The total capacitance (Coff or Con) of the unit cell is
where Cbu is MEMS bridge capacitance in the up-state
position and Cbd in the down-state position.
Considering that the on/off capacitive ratio (Cbd/Cbu) of
MEMS shunt capacitor switch with 1.5 mm air gap was
about 8 in our experiment, the bridge capacitance (Cbu) of
69 fF (100 mm x 102 mm) in up-state and the fixed MAM
capacitance (Cs/2) of 21 fF (62 mm x 50 mm) were determined
to meet the acceptable impedance matching up to 75 GHz.
The total inductance (Lb) of bridge and MAM capacitors is
26 pH. The Bragg frequencies of the unit cell in the phase
shifter are over 142 GHz for both switch states. In order to
achieve a very small fixed capacitance (Cs/2) of 21 fF,
MAM capacitor was employed instead of MIM capacitor
since it is less sensitive to the process variations
compared with the latter. It also offers high Q- factors at
high frequencies as required for V-band operation. The
bias for switching is applied directly to the MEMS switch
through the spiral inductors to reduce the switching DC
voltage down to 15-20 V. Total inductance of two
cascaded spiral inductor is 0.7 nH with self resonance
frequency higher than 87 GHz. The model parameters were
calculated using an electromagnetic ( EM) simulator, IE3D
and measured S -parameters. Simulated phase shift of the
unit cell is about 11.2° at 60 GHz.
The phase shifter was fabricated wi th electroplated
gold structures on a 520 mm -thick quartz substrate ( er =
3.8). The thickness of the CPW line and the bridge is 3 mm
and 2 mm, respectively. A 0.3 mm–thick SiN was deposited
with PECVD (plasma enhanced chemical vapor deposition)
over the signal line under the bridges to avoid DC short.
The details of the fabrication technology have been
reported in [11].
I II. MEASURENENTS
Fig.2 shows the photograph of the V -band 2-bit (90°,
180°) distributed MEMS phase shifter. The chip size is 6.3
mm x1.5 mm (24 bridges). DC bias for each one–bit phase
shifter is connected to the ground pad of CPW line while
the signal line is connected to DC ground through the
external bias tee. When DC bias is applied, the voltage
difference between the signal line and ground pad
generates a strong electric field under the membrane of
MEMS switch, which forces the membrane to snap down.
DC block capacitors are added between the consecutive
ground pads of 1-bit phase shifter sections and also
between the RF probe pads and the 1 -bit phase shifter
sections so that the bias may be applied independently
while keeping the RF ground plane continuity. The area of
the DC block MIM capacitor is 80 mm x 140 mm and the
thickness of SiN is 0.3 mm.
RF measurements were made on a HP 8510XF network
analyzer, calibrated using LRRM (Line-Reflect-Reflect-
Match) techniques with on-wafer standards. Measured
results of the 2 -bit phase shifter are shown in Fig. 3. As
shown in Fig. 3(a), the return losses for all four switching
states are better than 10 dB from 40 to 70 GHz and the
average insertion loss is about 2.2 dB at 60 GHz. Fig. 3(b)
illustrates the frequency-dependent phase shift for all the
switching states . The average phase error for all switching
states is 6.5 % at 60 GHz. Detailed phase shift data are
listed in Table II.
IV. CONCLUSIONS
A V -band low-loss distributed digital MEMS phase
shifter has been designed, fabricated, and tested for the
first time. By direct biasing to the bridge membranes
through the spiral choke inductors, the MEMS phase
shifter operates at a reasonable switching voltage of 15 to
20 V. In addition, the loss of the MEMS phase shifter was
reduced through the use of high-Q MAM capacitors
instead of the conventional MIM capacitor. Minimization
of the dielectric loss in the loaded lines resulted in low
average insertion loss of 2.2 dB / 2-bit (270°) at 60 GHz.
ACKNOWLEDGEMENT
This work was supported by Korean Ministry of Science
and Technology through Creative Research Initiative
Program.
Emmanuel Rodriguez
17208374
CRF
Fuente: http://www.ctsystemes.com/zeland/publi/ims2002_htkim.pdf
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