domingo, 30 de mayo de 2010

Understanding MEMS:

 

Understanding MEMS: DARPA Award to Create Computer-Aided Design Environment for Micro-Electromechanical Systems Devices
Researchers at the Georgia Institute of Technology have received a Defense Advanced Research Projects Agency (DARPA) award to participate in a multi-university research center that will develop a computer-aided design (CAD) environment for micro-electromechanical systems (MEMS) and nano-electromechanical systems (NEMS).

Professor John Papapolymerou, seated; Visiting Professor George Papaioannou, left, and graduate student Richard Daigler are participating in the multi-university IMPACT research center, which seeks to develop a computer-aided design (CAD) environment for micro-electromechanical systems (MEMS) and nano-electromechanical systems (NEMS).
The new research center – to be called the Investigate Multi-physics Modeling and Performance Assessment-driven Characterization and Computation Technology (IMPACT) Center for Advancement of MEMS/NEMS VLSI – will be led by the University of Illinois at Urbana-Champaign and will include teams from Purdue University and Lehigh University as well as Georgia Tech. A consortium of companies – including BAE Systems, Inc., Innovative Design & Technology, MEMtronics Corp., Raytheon Co., Rockwell Collins Inc. and the Rogers Corp. – will also participate financially with DARPA in the center.
Georgia Tech's share of the research will be conducted by a team associated with the Georgia Tech School of Electrical and Computer Engineering (ECE).

Prof. John Papapolymerou and graduate student Richard Daigler are participating in the multi-university IMPACT research center, which seeks to develop a computer-aided design (CAD) environment for micro-electromechanical systems (MEMS) and nano-electromechanical systems (NEMS).
The research will seek to develop CAD systems that are based on physical models and therefore can conclusively predict the behavior of MEMS devices. Eventually engineers developing systems with MEMS devices could use a simple drag-and-drop interface to simulate not only the electrical effects of MEMS usage, but also thermal, mechanical and reliability aspects as well.
"This kind of predictive capability could greatly increase the speed with which MEMS-enabled microsystems can be developed," said John Papapolymerou, an associate professor in ECE.
Initially, Papapolymerou said, Georgia Tech will receive about $1.25 million for a six-year effort. However, as more companies join the center, that amount is likely to increase, he added.
In the first year Georgia Tech's efforts will focus on the fundamental physics of MEMS devices – particularly with respect to dielectric charging of MEMS switches, Papapolymerou said.
Although MEMS-enabled microsystems have the potential to revolutionize communications, sensors and signal-processing, he said, their capabilities have been limited by a lack of understanding of how physical phenomena govern MEMS-device functionality. It's particularly unclear how much performance is degraded when MEMS devices are exposed to the operating conditions of a integrated circuit.

Micro-electromechanical systems (MEMS) are difficult to design, in part because the physics of their tiny moving parts is not fully understood. IMPACT's research will focus on development of CAD systems that are based on physical models and therefore can conclusively predict the behavior of MEMS devices
"When we have a better understanding of the fundamental physics of MEMS devices, we can then proceed to the higher-order models and levels that are required to develop a CAD program," Papapolymerou said.
The ultimate goal of the IMPACT center, he said, will be to promote the availability of MEMS/NEMS-based micro- and nanosystems in military and commercial applications.
"This is meant to be a dynamic center," Papapolymerou said. "The idea is going to be to expand this in the future, so we can also expand the number of research problems that we undertake."
REALIZADO POR:
GREINER A. GONZALEZ G.
SECCION 1
fUENTE:

Understanding MEMS:

 

Understanding MEMS: DARPA Award to Create Computer-Aided Design Environment for Micro-Electromechanical Systems Devices
Researchers at the Georgia Institute of Technology have received a Defense Advanced Research Projects Agency (DARPA) award to participate in a multi-university research center that will develop a computer-aided design (CAD) environment for micro-electromechanical systems (MEMS) and nano-electromechanical systems (NEMS).

Professor John Papapolymerou, seated; Visiting Professor George Papaioannou, left, and graduate student Richard Daigler are participating in the multi-university IMPACT research center, which seeks to develop a computer-aided design (CAD) environment for micro-electromechanical systems (MEMS) and nano-electromechanical systems (NEMS).
The new research center – to be called the Investigate Multi-physics Modeling and Performance Assessment-driven Characterization and Computation Technology (IMPACT) Center for Advancement of MEMS/NEMS VLSI – will be led by the University of Illinois at Urbana-Champaign and will include teams from Purdue University and Lehigh University as well as Georgia Tech. A consortium of companies – including BAE Systems, Inc., Innovative Design & Technology, MEMtronics Corp., Raytheon Co., Rockwell Collins Inc. and the Rogers Corp. – will also participate financially with DARPA in the center.
Georgia Tech's share of the research will be conducted by a team associated with the Georgia Tech School of Electrical and Computer Engineering (ECE).

Prof. John Papapolymerou and graduate student Richard Daigler are participating in the multi-university IMPACT research center, which seeks to develop a computer-aided design (CAD) environment for micro-electromechanical systems (MEMS) and nano-electromechanical systems (NEMS).
The research will seek to develop CAD systems that are based on physical models and therefore can conclusively predict the behavior of MEMS devices. Eventually engineers developing systems with MEMS devices could use a simple drag-and-drop interface to simulate not only the electrical effects of MEMS usage, but also thermal, mechanical and reliability aspects as well.
"This kind of predictive capability could greatly increase the speed with which MEMS-enabled microsystems can be developed," said John Papapolymerou, an associate professor in ECE.
Initially, Papapolymerou said, Georgia Tech will receive about $1.25 million for a six-year effort. However, as more companies join the center, that amount is likely to increase, he added.
In the first year Georgia Tech's efforts will focus on the fundamental physics of MEMS devices – particularly with respect to dielectric charging of MEMS switches, Papapolymerou said.
Although MEMS-enabled microsystems have the potential to revolutionize communications, sensors and signal-processing, he said, their capabilities have been limited by a lack of understanding of how physical phenomena govern MEMS-device functionality. It's particularly unclear how much performance is degraded when MEMS devices are exposed to the operating conditions of a integrated circuit.

Micro-electromechanical systems (MEMS) are difficult to design, in part because the physics of their tiny moving parts is not fully understood. IMPACT's research will focus on development of CAD systems that are based on physical models and therefore can conclusively predict the behavior of MEMS devices
"When we have a better understanding of the fundamental physics of MEMS devices, we can then proceed to the higher-order models and levels that are required to develop a CAD program," Papapolymerou said.
The ultimate goal of the IMPACT center, he said, will be to promote the availability of MEMS/NEMS-based micro- and nanosystems in military and commercial applications.
"This is meant to be a dynamic center," Papapolymerou said. "The idea is going to be to expand this in the future, so we can also expand the number of research problems that we undertake."
REALIZADO POR:
GREINER A. GONZALEZ G.
SECCION 1
fUENTE:

The Beginner's Guide to MEMS Processing

 

This guide is intended for people new to microelectromechanical systems (MEMS) technology. It gives a brief overview of the technology and some of the methods used to create microstructures. The guide is not intended as a comprehensive, all inclusive, description which is pointless anyway as the technology continues to develop. It is merely a short introduction to the basic fundamentals of the technology. If you are experienced in MEMS, you may not find much new information here. You may also want to refer to our MEMS glossary.
MEMS technology is based on a number of tools and methodologies, which are used to form small structures with dimensions in the micrometer scale (one millionth of a meter). Significant parts of the technology has been adopted from integrated circuit (IC) technology. For instance, almost all devices are build on wafers of silicon, like ICs. The structures are realized in thin films of materials, like ICs. They are patterned using photolithographic methods, like ICs. There are however several processes that are not derived from IC technology, and as the technology continues to grow the gap with IC technology also grows.
There are three basic building blocks in MEMS technology, which are the ability to deposit thin films of material on a substrate, to apply a patterned mask on top of the films by photolithograpic imaging, and to etch the films selectively to the mask. A MEMS process is usually a structured sequence of these operations to form actual devices. Please follow the links to read more about deposition, lithography and etching.
Deposition Processes
MEMS Thin Film Deposition Processes
One of the basic building blocks in MEMS processing is the ability to deposit thin films of material. In this text we assume a thin film to have a thickness anywhere between a few nanometer to about 100 micrometer. The film can subsequently be locally etched using processes described in the Lithography and Etching sections of this guide.
MEMS deposition technology can be classified in two groups:
1. Depositions that happen because of a chemical reaction:
o Chemical Vapor Deposition (CVD)
o Electrodeposition
o Epitaxy
o Thermal oxidation
These processes exploit the creation of solid materials directly from chemical reactions in gas and/or liquid compositions or with the substrate material. The solid material is usually not the only product formed by the reaction. Byproducts can include gases, liquids and even other solids.
2. Depositions that happen because of a physical reaction:
o Physical Vapor Deposition (PVD)
o Casting
Common for all these processes are that the material deposited is physically moved on to the substrate. In other words, there is no chemical reaction which forms the material on the substrate. This is not completely correct for casting processes, though it is more convenient to think of them that way.
This is by no means an exhaustive list since technologies evolve continuously.
Chemical Vapor Deposition (CVD)
In this process, the substrate is placed inside a reactor to which a number of gases are supplied. The fundamental principle of the process is that a chemical reaction takes place between the source gases. The product of that reaction is a solid material with condenses on all surfaces inside the reactor.
The two most important CVD technologies in MEMS are the Low Pressure CVD (LPCVD) and Plasma Enhanced CVD (PECVD). The LPCVD process produces layers with excellent uniformity of thickness and material characteristics. The main problems with the process are the high deposition temperature (higher than 600°C) and the relatively slow deposition rate. The PECVD process can operate at lower temperatures (down to 300° C) thanks to the extra energy supplied to the gas molecules by the plasma in the reactor. However, the quality of the films tend to be inferior to processes running at higher temperatures. Secondly, most PECVD deposition systems can only deposit the material on one side of the wafers on 1 to 4 wafers at a time. LPCVD systems deposit films on both sides of at least 25 wafers at a time. A schematic diagram of a typical LPCVD reactor is shown in the figure below.

Figure 1: Typical hot-wall LPCVD reactor.
When do I want to use CVD?
CVD processes are ideal to use when you want a thin film with good step coverage. A variety of materials can be deposited with this technology, however, some of them are less popular with fabs because of hazardous byproducts formed during processing. The quality of the material varies from process to process, however a good rule of thumb is that higher process temperature yields a material with higher quality and less defects.
Electrodeposition
This process is also known as "electroplating" and is typically restricted to electrically conductive materials. There are basically two technologies for plating: Electroplating and Electroless plating. In the electroplating process the substrate is placed in a liquid solution (electrolyte). When an electrical potential is applied between a conducting area on the substrate and a counter electrode (usually platinum) in the liquid, a chemical redox process takes place resulting in the formation of a layer of material on the substrate and usually some gas generation at the counter electrode.
In the electroless plating process a more complex chemical solution is used, in which deposition happens spontaneously on any surface which forms a sufficiently high electrochemical potential with the solution. This process is desirable since it does not require any external electrical potential and contact to the substrate during processing. Unfortunately, it is also more difficult to control with regards to film thickness and uniformity. A schematic diagram of a typical setup for electroplating is shown in the figure below.
When do I want to use electrodeposition?
The electrodeposition process is well suited to make films of metals such as copper, gold and nickel. The films can be made in any thickness from ~1µm to >100µm. The deposition is best controlled when used with an external electrical potential, however, it requires electrical contact to the substrate when immersed in the liquid bath. In any process, the surface of the substrate must have an electrically conducting coating before the deposition can be done.

Figure 2: Typical setup for electrodeposition.
Epitaxy
This technology is quite similar to what happens in CVD processes, however, if the substrate is an ordered semiconductor crystal (i.e. silicon, gallium arsenide), it is possible with this process to continue building on the substrate with the same crystallographic orientation with the substrate acting as a seed for the deposition. If an amorphous/polycrystalline substrate surface is used, the film will also be amorphous or polycrystalline.
There are several technologies for creating the conditions inside a reactor needed to support epitaxial growth, of which the most important is Vapor Phase Epitaxy (VPE). In this process, a number of gases are introduced in an induction heated reactor where only the substrate is heated. The temperature of the substrate typically must be at least 50% of the melting point of the material to be deposited.
An advantage of epitaxy is the high growth rate of material, which allows the formation of films with considerable thickness (>100µm). Epitaxy is a widely used technology for producing silicon on insulator (SOI) substrates. The technology is primarily used for deposition of silicon. A schematic diagram of a typical vapor phase epitaxial reactor is shown in the figure below.

Figure 3: Typical cold-wall vapor phase epitaxial reactor.
When do I want to use epitaxy?
This has been and continues to be an emerging process technology in MEMS. The process can be used to form films of silicon with thicknesses of ~1µm to >100µm. Some processes require high temperature exposure of the substrate, whereas others do not require significant heating of the substrate. Some processes can even be used to perform selective deposition, depending on the surface of the substrate.
Thermal oxidation
This is one of the most basic deposition technologies. It is simply oxidation of the substrate surface in an oxygen rich atmosphere. The temperature is raised to 800° C-1100° C to speed up the process. This is also the only deposition technology which actually consumes some of the substrate as it proceeds. The growth of the film is spurned by diffusion of oxygen into the substrate, which means the film growth is actually downwards into the substrate. As the thickness of the oxidized layer increases, the diffusion of oxygen to the substrate becomes more difficult leading to a parabolic relationship between film thickness and oxidation time for films thicker than ~100nm. This process is naturally limited to materials that can be oxidized, and it can only form films that are oxides of that material. This is the classical process used to form silicon dioxide on a silicon substrate. A schematic diagram of a typical wafer oxidation furnace is shown in the figure below.
When do I want to use thermal oxidation?
Whenever you can! This is a simple process, which unfortunately produces films with somewhat limited use in MEMS components. It is typically used to form films that are used for electrical insulation or that are used for other process purposes later in a process sequence.

Figure 4: Typical wafer oxidation furnace.
Physical Vapor Deposition (PVD)
PVD covers a number of deposition technologies in which material is released from a source and transferred to the substrate. The two most important technologies are evaporation and sputtering.
When do I want to use PVD?
PVD comprises the standard technologies for deposition of metals. It is far more common than CVD for metals since it can be performed at lower process risk and cheaper in regards to materials cost. The quality of the films are inferior to CVD, which for metals means higher resistivity and for insulators more defects and traps. The step coverage is also not as good as CVD.
The choice of deposition method (i.e. evaporation vs. sputtering) may in many cases be arbitrary, and may depend more on what technology is available for the specific material at the time.
Evaporation
In evaporation the substrate is placed inside a vacuum chamber, in which a block (source) of the material to be deposited is also located. The source material is then heated to the point where it starts to boil and evaporate. The vacuum is required to allow the molecules to evaporate freely in the chamber, and they subsequently condense on all surfaces. This principle is the same for all evaporation technologies, only the method used to the heat (evaporate) the source material differs. There are two popular evaporation technologies, which are e-beam evaporation and resistive evaporation each referring to the heating method. In e-beam evaporation, an electron beam is aimed at the source material causing local heating and evaporation. In resistive evaporation, a tungsten boat, containing the source material, is heated electrically with a high current to make the material evaporate. Many materials are restrictive in terms of what evaporation method can be used (i.e. aluminum is quite difficult to evaporate using resistive heating), which typically relates to the phase transition properties of that material. A schematic diagram of a typical system for e-beam evaporation is shown in the figure below.

Figure 5: Typical system for e-beam evaporation of materials.
Sputtering
Sputtering is a technology in which the material is released from the source at much lower temperature than evaporation. The substrate is placed in a vacuum chamber with the source material, named a target, and an inert gas (such as argon) is introduced at low pressure. A gas plasma is struck using an RF power source, causing the gas to become ionized. The ions are accelerated towards the surface of the target, causing atoms of the source material to break off from the target in vapor form and condense on all surfaces including the substrate. As for evaporation, the basic principle of sputtering is the same for all sputtering technologies. The differences typically relate to the manor in which the ion bombardment of the target is realized. A schematic diagram of a typical RF sputtering system is shown in the figure below.


Figure 6: Typical RF sputtering system.
Casting
In this process the material to be deposited is dissolved in liquid form in a solvent. The material can be applied to the substrate by spraying or spinning. Once the solvent is evaporated, a thin film of the material remains on the substrate. This is particularly useful for polymer materials, which may be easily dissolved in organic solvents, and it is the common method used to apply photoresist to substrates (in photolithography). The thicknesses that can be cast on a substrate range all the way from a single monolayer of molecules (adhesion promotion) to tens of micrometers. In recent years, the casting technology has also been applied to form films of glass materials on substrates. The spin casting process is illustrated in the figure below.
When do I want to use casting?
Casting is a simple technology which can be used for a variety of materials (mostly polymers). The control on film thickness depends on exact conditions, but can be sustained within +/-10% in a wide range. If you are planning to use photolithography you will be using casting, which is an integral part of that technology. There are also other interesting materials such as polyimide and spin-on glass which can be applied by casting.


Figure 7: The spin casting process as used for photoresist in photolithography.
Lithography
Pattern Transfer
Lithography in the MEMS context is typically the transfer of a pattern to a photosensitive material by selective exposure to a radiation source such as light. A photosensitive material is a material that experiences a change in its physical properties when exposed to a radiation source. If we selectively expose a photosensitive material to radiation (e.g. by masking some of the radiation) the pattern of the radiation on the material is transferred to the material exposed, as the properties of the exposed and unexposed regions differs (as shown in figure 1).

Figure 1: Transfer of a pattern to a photosensitive material.
This discussion will focus on optical lithography, which is simply lithography using a radiation source with wavelength(s) in the visible spectrum.
In lithography for micromachining, the photosensitive material used is typically a photoresist (also called resist, other photosensitive polymers are also used). When resist is exposed to a radiation source of a specific a wavelength, the chemical resistance of the resist to developer solution changes. If the resist is placed in a developer solution after selective exposure to a light source, it will etch away one of the two regions (exposed or unexposed). If the exposed material is etched away by the developer and the unexposed region is resilient, the material is considered to be a positive resist (shown in figure 2a). If the exposed material is resilient to the developer and the unexposed region is etched away, it is considered to be a negative resist (shown in figure 2b).

Figure 2: a) Pattern definition in positive resist, b) Pattern definition in negative resist.
Lithography is the principal mechanism for pattern definition in micromachining. Photosensitive compounds are primarily organic, and do not encompass the spectrum of materials properties of interest to micro-machinists. However, as the technique is capable of producing fine features in an economic fashion, a photosensitive layer is often used as a temporary mask when etching an underlying layer, so that the pattern may be transferred to the underlying layer (shown in figure 3a). Photoresist may also be used as a template for patterning material deposited after lithography (shown in figure 3b). The resist is subsequently etched away, and the material deposited on the resist is "lifted off".
The deposition template (lift-off) approach for transferring a pattern from resist to another layer is less common than using the resist pattern as an etch mask. The reason for this is that resist is incompatible with most MEMS deposition processes, usually because it cannot withstand high temperatures and may act as a source of contamination.

Figure 3: a) Pattern transfer from patterned photoresist to underlying layer by etching, b) Pattern transfer from patterned photoresist to overlying layer by lift-off.
Once the pattern has been transferred to another layer, the resist is usually stripped. This is often necessary as the resist may be incompatible with further micromachining steps. It also makes the topography more dramatic, which may hamper further lithography steps.
Alignment
In order to make useful devices the patterns for different lithography steps that belong to a single structure must be aligned to one another. The first pattern transferred to a wafer usually includes a set of alignment marks, which are high precision features that are used as the reference when positioning subsequent patterns, to the first pattern (as shown in figure 4). Often alignment marks are included in other patterns, as the original alignment marks may be obliterated as processing progresses. It is important for each alignment mark on the wafer to be labeled so it may be identified, and for each pattern to specify the alignment mark (and the location thereof) to which it should be aligned. By providing the location of the alignment mark it is easy for the operator to locate the correct feature in a short time. Each pattern layer should have an alignment feature so that it may be registered to the rest of the layers.

Figure 4: Use of alignment marks to register subsequent layers
Depending on the lithography equipment used, the feature on the mask used for registration of the mask may be transferred to the wafer (as shown in figure 5). In this case, it may be important to locate the alignment marks such that they don't effect subsequent wafer processing or device performance. For example, the alignment mark shown in figure 6 will cease to exist after a through the wafer DRIE etch. Pattern transfer of the mask alignment features to the wafer may obliterate the alignment features on the wafer. In this case the alignment marks should be designed to minimize this effect, or alternately there should be multiple copies of the alignment marks on the wafer, so there will be alignment marks remaining for other masks to be registered to.
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Figure 5: Transfer of mask registration feature to substrate during lithography (contact aligner)

Figure 6: Poor alignment mark design for a DRIE through the wafer etch (cross hair is released and lost).
Alignment marks may not necessarily be arbitrarily located on the wafer, as the equipment used to perform alignment may have limited travel and therefore only be able to align to features located within a certain region on the wafer (as shown in figure 7). The region location geometry and size may also vary with the type of alignment, so the lithographic equipment and type of alignment to be used should be considered before locating alignment marks. Typically two alignment marks are used to align the mask and wafer, one alignment mark is sufficient to align the mask and wafer in x and y, but it requires two marks (preferably spaced far apart) to correct for fine offset in rotation.


Figure 7: Restriction of location of alignment marks based on equipment used.
As there is no pattern on the wafer for the first pattern to align to, the first pattern is typically aligned to the primary wafer flat (as shown in figure 8). Depending on the lithography equipment used, this may be done automatically, or by manual alignment to an explicit wafer registration feature on the mask.

Figure 8: Mask alignment to the wafer flat.
Exposure
The exposure parameters required in order to achieve accurate pattern transfer from the mask to the photosensitive layer depend primarily on the wavelength of the radiation source and the dose required to achieve the desired properties change of the photoresist. Different photoresists exhibit different sensitivities to different wavelengths. The dose required per unit volume of photoresist for good pattern transfer is somewhat constant; however, the physics of the exposure process may affect the dose actually received. For example a highly reflective layer under the photoresist may result in the material experiencing a higher dose than if the underlying layer is absorptive, as the photoresist is exposed both by the incident radiation as well as the reflected radiation. The dose will also vary with resist thickness.
There are also higher order effects, such as interference patterns in thick resist films on reflective substrates, which may affect the pattern transfer quality and sidewall properties.
At the edges of pattern light is scattered and diffracted, so if an image is overexposed, the dose received by photoresist at the edge that shouldn't be exposed may become significant. If we are using positive photoresist, this will result in the photoresist image being eroded along the edges, resulting in a decrease in feature size and a loss of sharpness or corners (as shown in figure 9). If we are using a negative resist, the photoresist image is dilated, causing the features to be larger than desired, again accompanied by a loss of sharpness of corners. If an image is severely underexposed, the pattern may not be transferred at all, and in less sever cases the results will be similar to those for overexposure with the results reversed for the different polarities of resist.


Figure 9: Over and under-exposure of positive resist.
If the surface being exposed is not flat, the high-resolution image of the mask on the wafer may be distorted by the loss of focus of the image across the varying topography. This is one of the limiting factors of MEMS lithography when high aspect ratio features are present. High aspect ratio features also experience problems with obtaining even resist thickness coating, which further degrades pattern transfer and complicates the associated processing.
The Lithography Module
Typically lithography is performed as part of a well-characterized module, which includes the wafer surface preparation, photoresist deposition, alignment of the mask and wafer, exposure, develop and appropriate resist conditioning. The lithography process steps need to be characterized as a sequence in order to ensure that the remaining resist at the end of the modules is an optimal image of the mask, and has the desired sidewall profile.
The standard steps found in a lithography module are (in sequence): dehydration bake, HMDS prime, resist spin/spray, soft bake, alignment, exposure, post exposure bake, develop hard bake and descum. Not all lithography modules will contain all the process steps. A brief explanation of the process steps is included for completeness.
• Dehydration bake - dehydrate the wafer to aid resist adhesion.
• HMDS prime - coating of wafer surface with adhesion promoter. Not necessary for all surfaces.
• Resist spin/spray - coating of the wafer with resist either by spinning or spraying. Typically desire a uniform coat.
• Soft bake - drive off some of the solvent in the resist, may result in a significant loss of mass of resist (and thickness). Makes resist more viscous.
• Alignment - align pattern on mask to features on wafers.
• Exposure - projection of mask image on resist to cause selective chemical property change.
• Post exposure bake - baking of resist to drive off further solvent content. Makes resist more resistant to etchants (other than developer).
• Develop - selective removal of resist after exposure (exposed resist if resist is positive, unexposed resist if resist is positive). Usually a wet process (although dry processes exist).
• Hard bake - drive off most of the remaining solvent from the resist.
• Descum - removal of thin layer of resist scum that may occlude open regions in pattern, helps to open up corners.
We make a few assumptions about photolithography. Firstly, we assume that a well characterized module exists that: prepares the wafer surface, deposits the requisite resist thickness, aligns the mask perfectly, exposes the wafer with the optimal dosage, develops the resist under the optimal conditions, and bakes the resist for the appropriate times at the appropriate locations in the sequence. Unfortunately, even if the module is executed perfectly, the properties of lithography are very feature and topography dependent. It is therefore necessary for the designer to be aware of certain limitations of lithography, as well as the information they should provide to the technician performing the lithography.
The designer influences the lithographic process through their selections of materials, topography and geometry. The material(s) upon which the resist is to be deposited is important, as it affects the resist adhesion. The reflectivity and roughness of the layer beneath the photoresist determines the amount of reflected and dispersed light present during exposure. It is difficult to obtain a nice uniform resist coat across a surface with high topography, which complicates exposure and development as the resist has different thickness in different locations. If the surface of the wafer has many different height features, the limited depth of focus of most lithographic exposure tools will become an issue (as shown in figure 10).

Figure 10: Lithography tool depth of focus and surface topology.
The designer should keep all these limitations in mind, and design accordingly. For example, it is judicious, when possible, to perform very high aspect patterning step (lithography and subsequent etch/deposition) last, as the topography generated often hampers any further lithography steps. It is also necessary for the designer to make it clear which focal plane is most important to them (keeping in mind that features further away in Z from the focal plane will experience the worst focus). The resolution test structures should be located at this level (as they will be used by the fab to check the quality of a photo step).
Etching Processes
In order to form a functional MEMS structure on a substrate, it is necessary to etch the thin films previously deposited and/or the substrate itself. In general, there are two classes of etching processes:
1. Wet etching where the material is dissolved when immersed in a chemical solution
2. Dry etching where the material is sputtered or dissolved using reactive ions or a vapor phase etchant
In the following, we will briefly discuss the most popular technologies for wet and dry etching.
Wet etching
This is the simplest etching technology. All it requires is a container with a liquid solution that will dissolve the material in question. Unfortunately, there are complications since usually a mask is desired to selectively etch the material. One must find a mask that will not dissolve or at least etches much slower than the material to be patterned. Secondly, some single crystal materials, such as silicon, exhibit anisotropic etching in certain chemicals. Anisotropic etching in contrast to isotropic etching means different etch rates in different directions in the material. The classic example of this is the <111> crystal plane sidewalls that appear when etching a hole in a <100> silicon wafer in a chemical such as potassium hydroxide (KOH). The result is a pyramid shaped hole instead of a hole with rounded sidewalls with a isotropic etchant. The principle of anisotropic and isotropic wet etching is illustrated in the figure below.
When do I want to use wet etching?
This is a simple technology, which will give good results if you can find the combination of etchant and mask material to suit your application. Wet etching works very well for etching thin films on substrates, and can also be used to etch the substrate itself. The problem with substrate etching is that isotropic processes will cause undercutting of the mask layer by the same distance as the etch depth. Anisotropic processes allow the etching to stop on certain crystal planes in the substrate, but still results in a loss of space, since these planes cannot be vertical to the surface when etching holes or cavities. If this is a limitation for you, you should consider dry etching of the substrate instead. However, keep in mind that the cost per wafer will be 1-2 orders of magnitude higher to perform the dry etching
If you are making very small features in thin films (comparable to the film thickness), you may also encounter problems with isotropic wet etching, since the undercutting will be at least equal to the film thickness. With dry etching it is possible etch almost straight down without undercutting, which provides much higher resolution.

Figure 1: Difference between anisotropic and isotropic wet etching.
Dry etching
The dry etching technology can split in three separate classes called reactive ion etching (RIE), sputter etching, and vapor phase etching.
In RIE, the substrate is placed inside a reactor in which several gases are introduced. A plasma is struck in the gas mixture using an RF power source, breaking the gas molecules into ions. The ions are accelerated towards, and reacts at, the surface of the material being etched, forming another gaseous material. This is known as the chemical part of reactive ion etching. There is also a physical part which is similar in nature to the sputtering deposition process. If the ions have high enough energy, they can knock atoms out of the material to be etched without a chemical reaction. It is a very complex task to develop dry etch processes that balance chemical and physical etching, since there are many parameters to adjust. By changing the balance it is possible to influence the anisotropy of the etching, since the chemical part is isotropic and the physical part highly anisotropic the combination can form sidewalls that have shapes from rounded to vertical. A schematic of a typical reactive ion etching system is shown in the figure below.
A special subclass of RIE which continues to grow rapidly in popularity is deep RIE (DRIE). In this process, etch depths of hundreds of microns can be achieved with almost vertical sidewalls. The primary technology is based on the so-called "Bosch process", named after the German company Robert Bosch which filed the original patent, where two different gas compositions are alternated in the reactor. The first gas composition creates a polymer on the surface of the substrate, and the second gas composition etches the substrate. The polymer is immediately sputtered away by the physical part of the etching, but only on the horizontal surfaces and not the sidewalls. Since the polymer only dissolves very slowly in the chemical part of the etching, it builds up on the sidewalls and protects them from etching. As a result, etching aspect ratios of 50 to 1 can be achieved. The process can easily be used to etch completely through a silicon substrate, and etch rates are 3-4 times higher than wet etching.
Sputter etching is essentially RIE without reactive ions. The systems used are very similar in principle to sputtering deposition systems. The big difference is that substrate is now subjected to the ion bombardment instead of the material target used in sputter deposition.
Vapor phase etching is another dry etching method, which can be done with simpler equipment than what RIE requires. In this process the wafer to be etched is placed inside a chamber, in which one or more gases are introduced. The material to be etched is dissolved at the surface in a chemical reaction with the gas molecules. The two most common vapor phase etching technologies are silicon dioxide etching using hydrogen fluoride (HF) and silicon etching using xenon diflouride (XeF2), both of which are isotropic in nature. Usually, care must be taken in the design of a vapor phase process to not have bi-products form in the chemical reaction that condense on the surface and interfere with the etching process.
When do I want to use dry etching?
The first thing you should note about this technology is that it is expensive to run compared to wet etching. If you are concerned with feature resolution in thin film structures or you need vertical sidewalls for deep etchings in the substrate, you have to consider dry etching. If you are concerned about the price of your process and device, you may want to minimize the use of dry etching. The IC industry has long since adopted dry etching to achieve small features, but in many cases feature size is not as critical in MEMS. Dry etching is an enabling technology, which comes at a sometimes high cost.

Figure 2: Typical parallel-plate reactive ion etching system.
Current Challenges
MEMS and Nanotechnology is currently used in low- or medium-volume applications.
Some of the obstacles preventing its wider adoption are:
Limited Options
Most companies who wish to explore the potential of MEMS and Nanotechnology have very limited options for prototyping or manufacturing devices, and have no capability or expertise in microfabrication technology. Few companies will build their own fabrication facilities because of the high cost. A mechanism giving smaller organizations responsive and affordable access to MEMS and Nano fabrication is essential.
Packaging
The packaging of MEMS devices and systems needs to improve considerably from its current primitive state. MEMS packaging is more challenging than IC packaging due to the diversity of MEMS devices and the requirement that many of these devices be in contact with their environment. Currently almost all MEMS and Nano development efforts must develop a new and specialized package for each new device. Most companies find that packaging is the single most expensive and time consuming task in their overall product development program. As for the components themselves, numerical modeling and simulation tools for MEMS packaging are virtually non-existent. Approaches which allow designers to select from a catalog of existing standardized packages for a new MEMS device without compromising performance would be beneficial.
Fabrication Knowledge Required
Currently the designer of a MEMS device requires a high level of fabrication knowledge in order to create a successful design. Often the development of even the most mundane MEMS device requires a dedicated research effort to find a suitable process sequence for fabricating it. MEMS device design needs to be separated from the complexities of the process sequence.
How the MEMS and Nanotechnology Exchange Can Help
The MEMS and Nanotechnology Exchange provides services that can help with some of these problems.
• We make a diverse catalog of processing capabilities available to our users, so our users can experiment with different fabrication technologies. We also have a number of novel processes that are difficult to obtain from other fabrication services.
• Our users don't have to build their own fabrication facilities, and
• Our web-based interface lets users assemble process sequences and submit them for review by the MEMS and Nanotechnology Exchange's engineers and fabrication sites.

REALIZADO POR:
GREINER A. GONZALEZ G.
SECCION 1
fUENTE:
www.mems-exchange.org/MEMS/what-is.html

MEMS Technology Overview

 





Microvision MEMS Technology
Microvision, a leading developer of scanned light beam technology, has unveiled a new laser bar code scanner, incorporating the company's unique silicon MEMS scanning mirror technology. The product, named ROV™ Scanner, is a fashionably sleek, hand-held, Bluetooth enabled laser bar code scanner aimed at mobile workers who need simple and affordable data collection.


The MEMS scanner
MEMS (Micro- Electro-Mechanical Systems) is the integration of mechanical elements and electronics on a common silicon substrate. Inherent advantages of MEMS devices are high reliability, low power operation, small size, low cost to manufacture, and high scalability to volume production. Microvision has utilized these advantages to advance its 2D light scanning and image capture technology into a number of next generation products for pico projectors, vehicles displays, and wearable displays that interface to mobile devices. Microvision has also leveraged these same advantages into its bar code scanner products with the design and introduction of the ROV Scanner, a 1-D MEMSbased bar code scanner. With over 100 patents issued and 80 pending, Microvision has proven expertise in MEMS technology.
MEMS devices have proven their value and reliability in other markets and products such as projection display systems, consumer electronics and medical applications in imaging and blood pressure monitoring. They are also a key element in the highly demanding automotive market's safety restraint system (air bags) and suspension control systems.
Improved reliability is a key benefit of a MEMS-based bar code scanner technology compared to other laser bar code scanner technologies. Even after millions of scans, the integrity of the MEMS-engine does not degrade due to the inherent properties of silicon. The oscillating silicon mirror is extremely small and lightweight, reducing susceptibility to performance degradation resulting from bumps and vibrations often experienced with a handheld device. Integrating all moving parts onto a low mass MEMS engine eliminates parts that wear out or fatigue with use.
Laser bar code scanning engines provide advantages over other scanning methods such as greater scan distance, larger bar code capability, reduced ambient light susceptibility, and ability to read on irregular surfaces. Further, a MEMS-based laser bar code scanner provides these same advantages with higher reliability at a lower cost. The manufacturing techniques for fabricating MEMS devices enable lower cost of production. By utilizing well established semiconductor processes and producing many devices on a single silicon wafer, MEMS part price is kept low. As well as being cost effective, these design and manufacturing practices are easily scaled to high volume production.



The Scan Engine Assembly
At the heart of the ROV™ Scanner is the MEMS-based scan engine subsystem. This subsystem is well suited for a stand alone product with potential as an embedded component extending functionality of other devices such as cell phones, mobile computers, or kiosks. MEMS technology is an exciting new field which continues to yield promising developments of higher levels of integration and increased
performance at lower costs.
Microvision continues to forge ahead with its product vision of providing simple and affordable data collection for price sensitive applications. Leveraging its expertise in MEMS-based light scanning into its own scan engine further enables this promise.

REALIZADO POR:

GREINER A. GONZALEZ G.

SECCION 1

fUENTE:

www.microvision.com/barcode/mems_scanner.html

 

What are Microsystems / MEMS?

 

MEMS is an abbreviation for Micro Electro Mechanical Systems. This is a rapidly emerging technology combining electrical, electronic, mechanical, optical, material, chemical, and fluids engineering disciplines. As the smallest commercially produced "machines", MEMS devices are similar to traditional sensors and actuators although much, much smaller. e.g. Complete systems are typically a few millimeters across, with individual features / devices of the order of 1-100 micrometers across.

Electron micrscope image of a MEMS electromechanical lock. Courtesy Sandia National Labs.
MEMS devices are manufactured either using processes based on Integrated Circuit fabrication techniques and materials, or using new emerging fabrication technologies such as micro injection molding. These former processes involve building the device up layer by layer, involving several material deposition and etch steps. A typical MEMS fabrication technology may have a 5 step process. Due to the limitations of this "traditional IC" manufacturing process MEMS devices are substantially planar, having very low aspect ratios (typically 5 -10 micro meters thick). It is important to note that there are several evolving fabrication techniques that allow higher aspect ratios such as deep x-ray lithography, electrodeposition, and micro injection molding.
MEMS devices are typically fabricated onto a substrate (chip) that may also contain the electronics required to interact with the MEMS device. Due to the small size and mass of the devices, MEMS components can be actuated electrostatically (piezoelectric and bimetallic effects can also be used). The position of MEMS components can also be sensed capacitively. Hence the MEMS electronics include electrostatic drive power supplies, capacitance charge comparators, and signal conditioning circuitry. Connection with the macroscopic world is via wire bonding and encapsulation into familiar BGA, MCM, surface mount, or leaded IC packages.

A common MEMS actuator is the "linear comb drive" (shown above) which consists of rows of interlocking teeth; half of the teeth are attached to a fixed "beam", the other half attach to a movable beam assembly. Both assemblies are electrically insulated. By applying the same polarity voltage to both parts the resultant electrostatic force repels the movable beam away from the fixed. Conversely, by applying opposite polarity the parts are attracted. In this manner the comb drive can be moved "in" or "out" and either DC or AC voltages can be applied. The small size of the parts (low inertial mass) means that the drive has a very fast response time compared to its macroscopic counterpart. The magnitude of electrostatic force is multiplied by the voltage or more commonly the surface area and number of teeth. Commercial comb drives have several thousand teeth, each tooth approximately 10 micro meters long. Drive voltages are CMOS levels.
The linear push / pull motion of a comb drive can be converted into rotational motion by coupling the drive to push rod and pinion on a wheel. In this manner the comb drive can rotate the wheel in the same way a steam engine functions!
The First MEMS Device:
In case you were wondering microsystems have physically been around since the late 1960's. It is generally agreed that the first MEMS device was a gold resonating MOS gate structure. [H.C. Nathanson, et al., The Resonant Gate Transistor, IEEE Trans. Electron Devices, March 1967, vol. 14, no. 3, pp 117-133.]

Schematic of the first MEMS device
Microsystem Analysis Requirements:
Microsystems are inherently multiphysics in nature and thus require a sophisticated coupled physics analysis capability in order to capture actuation and transducer effects accurately. The following analyis features are fundamental requirements for the analysis solution:
• Requires a system of units applicable to small geometric scale.
• Ability to handle unique material properties that are not in the public domain.
• Ability to mesh high aspect ratio device geometry.
• Lumped parameter extraction & reduced order macro modeling for system level simulation.
• Ability to model large field domains associated with electromagnetics and CFD.
 
 

REALIZADO POR:

GREINER A. GONZALEZ G.

SECCION 1

fUENTE:

en: www.ansys.com/industries/mems/mems-what-is.asp

MEMS

 

Tiny electromechanical systems on a silicon chip. MEMS comprise integrated mechanical elements, sensors, actuators, and electronics on a common silicon substrate through microfabrication technologies, including the micromachining of the mechanical elements. MEMS are employed in optical projectors as well as in purely optical switches used in fiber optics transmission systems (FOTS), and actually are more along the lines of optical cross-connects. As purely optical devices, they do not require that the incoming optical signal be converted to an electrical signal for processing and then be reconverted to an optical signal. In other words, MEMS are optical-optical-optical (OOO), rather than optical-electrical-optical (OEO). See also cross-connect, FOTS, and switch.
MEMS
(MicroElectroMechanical Systems) Tiny mechanical devices that are built onto semiconductor chips and are measured in micrometers. In the research labs since the 1980s, MEMS devices began to materialize as commercial products in the mid-1990s. They are used to make pressure, temperature, chemical and vibration sensors, light reflectors and switches as well as accelerometers for airbags, vehicle control, pacemakers and games. The technology is also used to make inkjet print heads, microactuators for read/write heads and all-optical switches that reflect light beams to the appropriate output port. See accelerometer.
MEMS and MOEMS
When optical components are included in a MEMS device, it is called a micro-opto-electromechanical system (MOEMS). For example, adding a photonic sensor to a silicon chip constitutes a MOEMS device. See micromachine, MEMS mirror, DLP and optical switch.
MEMS Vs. Nanotechnology
Sometimes MEMS and nanotechnology are terms that are used interchangeably, because they both deal with microminiaturized objects. However, they are vastly different. MEMS deals with creating devices that are measured in micrometers, whereas nantotechnology deals with manipulating atoms at the nanometer level.


MEMS-based Optical Switch
In an all-optical switch, MEMS mirrors reflect the input signal to an output port without regard to line speed or protocol. This technology is expected to be the dominant method for building photonic switches.


Sample Micromachines
Microfabrica's EFAB system was the first MEMS foundry process to accept CAD files as input, turning customer designs into micromachines much faster than traditional methods. EFAB builds the devices one metal layer at a time. In this image, the square at the top is a microfluidics device with internal passageways used for a "lab on a chip." The multi-arm device (center) is a fuel injection nozzle. Bottom left is an accelerometer, and bottom right is an inductor used in RF circuits. (Image courtesy of Microfabrica Inc., www.microfabrica.com)


MEMS-Based Accelerometer
MEMSIC's dual-axis thermal accelerator is a MEMS-based semiconductor device that works conceptually like the air bubble in a construction level. The square in the middle of the chip is a resistor that heats up a gas bubble. The next larger squares contain thermal couples that sense the location of the heated bubble as the device is tilted or accelerated. (Image courtesy of MEMSIC, Inc.)

REALIZADO POR:

GREINER A. GONZALEZ G.

SECCION 1

fUENTE:

www.yourdictionary.com/computer/mems

 

 

MEMS Technology: The Next Big Thing?

 

In a recent MarketWatch column John Dvorak puts his finger on what he has called "the MEMS juggernaut" claiming "A Silicon Valley revolution is coming."

Hot and about to get hotter, MEMS stands for Micro-Electro-Mechanical Systems (MEMS) and is, according to MEMS Exchange "the integration of mechanical elements, sensors, actuators, and electronics on a common silicon substrate through microfabrication technology."

Whereas electronics are fabricated using integrated circuit (IC) process sequences (e.g., CMOS, Bipolar, or BICMOS processes), the micromechanical components are fabricated using compatible "micromachining" processes that selectively etch away parts of the silicon wafer or add new structural layers to form the mechanical and electromechanical devices.
As astute a Silicon Valley observer as there is, Dvorak noted that "The recent publicity for Hewlett-Packard and its new MEMS (micro-electro-mechanical system) accelerometer sent a message to Silicon Valley. The message was that MEMS technologies have indeed taken root and may be the target of the next generation of high tech venture investments after we're done with "green." "
He claims there has not been a big push in the valley for new MEMS start-ups, probably due to the "moribund IPO market."
But MEMS profile as a promising industry segment may be about to take off.
This week the MEMS Executive Congress held its fifth event in Sonoma, CA, a gathering that attracted business leaders from a broad spectrum of industries (automotive, consumer goods, industrial, medical, telecom, and more) to promote this industry. The Congress is said to provide end users and MEMS companies a forum to interact and share experiences relating to the commercialization of MEMS. The congress is organized by the MEMS Industry Group.
In one panel discussion, MEMS Executive Congress panelists explored how MEMS is driving energy efficiency, safety and the driver experience in automobiles as well as its impact on other market sectors. It also explored some of the many initiatives promoting the manufacture of energy-efficient cars, including the Association for European NanoElectronics Activities' E3Car.
Other Congress keynotes included a look at RF MEMS for the 4G handset industry from NTT DOCOMO, and a pesentatuion from from Dr. Mauro Ferrari Chair of the Dept of NanoMedicine and Biomedical Engineering at the Univ of Texas Medical School at Houston.
Learn more about MEMS by visiting the Congresse's website where you can also
download all the presentations from the Congress.
And for a quick online tutorial on MEMS see the video below.
 

REALIZADO POR:

GREINER A. GONZALEZ G.

SECCION 1

fUENTE:

www188.pair.com/next1/mems/


What is MEMS Technology?

 

Micro-Electro-Mechanical Systems (MEMS) is the integration of mechanical elements, sensors, actuators, and electronics on a common silicon substrate through microfabrication technology. While the electronics are fabricated using integrated circuit (IC) process sequences (e.g., CMOS, Bipolar, or BICMOS processes), the micromechanical components are fabricated using compatible "micromachining" processes that selectively etch away parts of the silicon wafer or add new structural layers to form the mechanical and electromechanical devices.

MEMS promises to revolutionize nearly every product category by bringing together silicon-based microelectronics with micromachining technology, making possible the realization of complete systems-on-a-chip. MEMS is an enabling technology allowing the development of smart products, augmenting the computational ability of microelectronics with the perception and control capabilities of microsensors and microactuators and expanding the space of possible designs and applications.
Microelectronic integrated circuits can be thought of as the "brains" of a system and MEMS augments this decision-making capability with "eyes" and "arms", to allow microsystems to sense and control the environment. Sensors gather information from the environment through measuring mechanical, thermal, biological, chemical, optical, and magnetic phenomena. The electronics then process the information derived from the sensors and through some decision making capability direct the actuators to respond by moving, positioning, regulating, pumping, and filtering, thereby controlling the environment for some desired outcome or purpose. Because MEMS devices are manufactured using batch fabrication techniques similar to those used for integrated circuits, unprecedented levels of functionality, reliability, and sophistication can be placed on a small silicon chip at a relatively low cost.
MEMS and Nanotechnology Applications
There are numerous possible applications for MEMS and Nanotechnology. As a breakthrough technology, allowing unparalleled synergy between previously unrelated fields such as biology and microelectronics, many new MEMS and Nanotechnology applications will emerge, expanding beyond that which is currently identified or known. Here are a few applications of current interest:
Biotechnology
MEMS and Nanotechnology is enabling new discoveries in science and engineering such as the Polymerase Chain Reaction (PCR) microsystems for DNA amplification and identification, micromachined Scanning Tunneling Microscopes (STMs), biochips for detection of hazardous chemical and biological agents, and microsystems for high-throughput drug screening and selection.
Communications
High frequency circuits will benefit considerably from the advent of the RF-MEMS technology. Electrical components such as inductors and tunable capacitors can be improved significantly compared to their integrated counterparts if they are made using MEMS and Nanotechnology. With the integration of such components, the performance of communication circuits will improve, while the total circuit area, power consumption and cost will be reduced. In addition, the mechanical switch, as developed by several research groups, is a key component with huge potential in various microwave circuits. The demonstrated samples of mechanical switches have quality factors much higher than anything previously available.
Reliability and packaging of RF-MEMS components seem to be the two critical issues that need to be solved before they receive wider acceptance by the market.
Accelerometers
MEMS accelerometers are quickly replacing conventional accelerometers for crash air-bag deployment systems in automobiles. The conventional approach uses several bulky accelerometers made of discrete components mounted in the front of the car with separate electronics near the air-bag; this approach costs over $50 per automobile. MEMS and Nanotechnology has made it possible to integrate the accelerometer and electronics onto a single silicon chip at a cost between $5 to $10. These MEMS accelerometers are much smaller, more functional, lighter, more reliable, and are produced for a fraction of the cost of the conventional macroscale accelerometer elements.

Fabricating MEMS and Nanotechnology

MEMS and Nano devices are extremely small -- for example, MEMS and Nanotechnology has made possible electrically-driven motors smaller than the diameter of a human hair (right) -- but MEMS and Nanotechnology is not primarily about size.
MEMS and Nanotechnology is also not about making things out of silicon, even though silicon possesses excellent materials properties, which make it an attractive choice for many high-performance mechanical applications; for example, the strength-to-weight ratio for silicon is higher than many other engineering materials which allows very high-bandwidth mechanical devices to be realized.
Instead, the deep insight of MEMS and Nano is as a new manufacturing technology, a way of making complex electromechanical systems using batch fabrication techniques similar to those used for integrated circuits, and uniting these electromechanical elements together with electronics.
Advantages of MEMS and Nano Manufacturing
First, MEMS and Nanotechnology are extremely diverse technologies that could significantly affect every category of commercial and military product. MEMS and Nanotechnology are already used for tasks ranging from in-dwelling blood pressure monitoring to active suspension systems for automobiles. The nature of MEMS and Nanotechnology and its diversity of useful applications make it potentially a far more pervasive technology than even integrated circuit microchips.
Second, MEMS and Nanotechnology blurs the distinction between complex mechanical systems and integrated circuit electronics. Historically, sensors and actuators are the most costly and unreliable part of a macroscale sensor-actuator-electronics system. MEMS and Nanotechnology allows these complex electromechanical systems to be manufactured using batch fabrication techniques, decreasing the cost and increasing the reliability of the sensors and actuators to equal those of integrated circuits. Yet, even though the performance of MEMS and Nano devices is expected to be superior to macroscale components and systems, the price is predicted to be much lower.
REALIZADO POR:
GREINER A. GONZALEZ G.
SECCION 1
fUENTE:

Dispositivos mecánicos ultra pequeños: los MEMS

Dispositivos mecánicos ultra pequeños: los MEMS

En el otro extremo de las técnicas de fabricación tenemos el método llamado de "top-down" que corresponde a la realización de estructuras m=1000 nm =10-6 m) a partir de un proceso de reducción y?micrométricas (1 moldeado de materiales de dimensiones mayores. Este es el método típico de fabricación de dispositivos propios de la microelectrónica y que gracias al avance de las técnicas de litografía permite alcanzar hoy en día escalas submicrométricas.
Para fijar ideas podemos decir que en el microprocesador de una computadora actual tenemos unos 50 millones de transistores por cm2, lo que m2 por transistor, con un detalle de los?implica una dimensión típica de 1 contornos del orden de los 100 nm. Esta miniaturización ha permitido reducir componentes electrónicos voluminosos dando a lugar a equipos portátiles, que de otra manera no se emplearían (radios personales, notebooks, teléfonos celulares, etc.) con un panorama de aplicaciones increíble.

¿Y qué tal si lográramos reducir máquinas enteras?
Se podrían construir, por ejemplo, pequeños dinamómetros (sensores de fuerza) que colocados en las patas de una cucaracha nos permitirían entender cómo efectúa y distribuye las fuerzas para lograr un desplazamiento tan eficiente en superficies no horizontales. Esta información nos llevaría eventualmente a construir nuevos dispositivos mecánicos en la escala humana para simular las técnicas de desplazamiento de estos insectos. También se podría armar, en dimensiones muy reducidas, un dispositivo ubicado en el cuerpo de un paciente ("lab on chip"), que analizara su sangre y que, en función de los resultados, inyectara fármacos en las dosis adecuadas, y hasta podría enviar una señal de alerta para que el paciente fuera atendido de urgencia. Estas máquinas funcionarían en definitiva como pequeños robots que nos permitirían la realización de un conjunto de tareas hasta hoy inaccesibles en un mundo de escala micrométrica.
La miniaturización de máquinas electromecánicas o MEMS ya es una realidad de nuestros días. Efectivamente, estos microdispositivos ya se emplean para la realización de acelerómetros, presentes en los airbags de los autos para determinar el momento justo en que se produce un choque y disparar así el mecanismo de inflado de las bolsas. Este mismo tipo de MEMS se emplean como elementos de navegación, particularmente en la industria aeroespacial, pero también se prevén aplicaciones como sensores de presión, temperatura y humedad. Se los ha incorporado en marcapasos, para sensar la actividad física del paciente y modificar su ritmo cardíaco. Para evitar falsificaciones de firmas, se ha pensado incorporar estos acelerómetros en lapiceras. De esta manera, no sólo estaría registrado el trazo particular de la firma sino también las velocidades y aceleraciones que le imprimió la mano a la lapicera mientras se firmaba, lo cual haría mucho más difícil su falsificación. También se emplean MEMS en los cabezales de las impresoras de chorro de tinta, produciendo la evaporación controlada de la tinta en el momento justo, y gracias a la entrega localizada de calor. Además de la ventaja del tamaño de estos dispositivos está el hecho de que se los puede fabricar de a miles abaratando notablemente su costo de fabricación.
Los MEMS, como toda nueva tecnología, han tenido un impacto importante a la hora de favorecer el acceso a nuevo conocimiento científico. Este es el caso de la llamada óptica adaptable. La luz de los objetos astronómicos que llega a los telescopios terrestres pasa necesariamente a través de la atmósfera, variando su camino óptico por las variaciones de densidad del aire y de temperatura. Como resultado se obtiene una imagen borrosa, con mala resolución angular. Para evitar este problema, una solución costosa es la de ubicar los telescopios en el espacio (como es el caso del Hubble). Otra solución menos costosa e interesante por su capacidad de emplear telescopios grandes, no limitados por las dimensiones que se pueden manejar en los transportes espaciales, es la que aportó el desarrollo de espejos cuya superficie se deforma mediante MEMS, corrigiendo las distorsiones que produce la atmósfera terrestre.


Esquema del dispositivo que corrige las deformaciones de la imagen producidas por la turbulencia de la atmósfera terrestre. La óptica adaptable, realizada mediante MEMS, permite neutralizar este efecto y obtener una resolución angular adecuada como para distinguir objetos estelares que de otra manera se encontrarían confundidos en una imagen borrosa.
Otra aplicación científica de los MEMS fue la realización de instrumentos de medición de fuerzas entre dos objetos cuyas superficies se encuentran a distancias submicrométricas (< href="http://3.bp.blogspot.com/_NFriHlFbUH4/TAHSwwX8TKI/AAAAAAAAAsk/zqu2XrN_jSA/s1600/N2.bmp">


En esta imagen, obtenida mediante un microscopio electrónico de barrido (SEM), se puede apreciar un conjunto de bobinas de tamaño micrométrico realizadas mediante técnicas litográficas.

REALIZADO POR:

GREINER A. GONZALEZ G.

SECCION 1

fUENTE:

http://aportes.educ.ar/fisica/nucleo-teorico/estado-del-arte/nuevas-herramientas/dispositivos_mecanicos_ultra_p.php

 

domingo, 9 de mayo de 2010

Samsung prepara un micro-obturador para cámaras de celular

La compañía coreana Samsung se encuentra desarrollando una pequeña pieza para las cámaras digitales integradas en teléfonos que puede revolucionar al mercado. Se trata de un obturador de tan sólo 2.2 mm de diámetro basado en tecnología MEMS (sistemas microelectromecánicos).

Básicamente el obturador es la parte que permite la entrada de luz a la cámara y que se encuentra incorporado tras del lente. El obturador se abre cuando se fotografía en lugares oscuros y se cierra a plena luz, dejando un orificio mínimo.
La ventaja de de este micro-obturador -con el tamaño ideal para dispositivos móviles como los celulares- es que mejorará notablemente las imágenes tomadas con cámaras de alta resolución, como la cámara del Sony Ericsson Idou de 12 MP o la de 8 MP del Nokia N86.
Avances tecnológicos como éste son excelentes noticias para los fans de las cámaras con teléfono, ya que dan cuenta que los fabricantes no sólo están preocupados de meter más megapíxeles en los equipos (que en realidad no aporta nada salvo imágenes más grandes), sino que también en mejorar la calidad de las fotos que se pueden obtener con un celular.

Por el momento se desconoce cuánto costará el obturador y cuándo estará totalmente desarrollado. Supuestamente será más barato que los obturadores tradicionales y lo más posible es que falte bastante tiempo para verlo integrado en equipos, pero los resultados valdrán la espera.


 

Montan un lente de cámara dSLR en un iPhone


No es ningún misterio que uno de los puntos en contra del iPhone es su cámara mediocre, pero ponerle un lente de una cámara dSLR parece demasiado loco, aunque justamente es lo que hoy les mostramos. Un hack que permite utilizar un querido lente Canon 18-55 IS, también conocido como pISapapeles junto a tu iPhone.

Con esta modificación casera se gana en zoom óptico y en efectos de enfoque selectivo, pero las aberraciones cromáticas y el viñeteo hacen de las suyas. Sin duda sólo una muestra curiosa de lo que se puede hacer con tiempo y dedicación que puedes replicar siguiendo esta guía.

 
 
Nombre: Lenny D. Ramirez C.
Asignatura: CRF
Dirección: http://www.wayerless.com/up/2009/05/samsung-mems-shutter_01.jp
Ver blogg: http://lennyramirez-crf.blogspot.com/

Structured Design Methodology for MEMS

One important trend in microelectromechanical systems (MEMS) is toward monolithic systems where micromechanical devices are integrated with digital I/O, self-test, auto-calibration, digital compensation, and other signal processing functions. There is a growing demand in the MEMS community for rapid micromechanical design and analysis of complex systems involving multiple physical domains, including mechanical, electrostatic, magnetic, thermal, fluidic, and optical domains.
An important question generated in this workshop is: Can structured design methods for MEMS be developed by making an analogy to the VLSI design methodology? CAD for VLSI spans many levels of abstraction from materials, device, circuit, logic, register, to system level. At each of these levels, a design can be viewed in physical, structural (schematic), or behavioral form. A similar esign hierarchy for MEMS is feasible and sorely needed. Analogous hierarchical levels up to he VLSI 'circuit' level are easily made; higher levels of abstraction may evolve for MEMS that are ifferent from the VLSI paradigm. A first task in development of structured MEMS design tools is he formation of standard data representations and standard cell libraries. An enormous effort is necessary o identify and to model reusable MEMS processes, elements, devices, and architectures.
MEMS CAD tools must be integrated, with appropriate links available to the designer to switch between different lateral views and hierarchical levels.
An initial wish-list in the MEMS CAD toolset includes:


• standard MEMS data representations and interchange formats

• standard MEMS cell libraries supporting behavioral, schematic, and physical views at all levels of abstraction (e.g. materials database, layout cells, schematic element library, and a system macro-model library)

• standard MEMS process-module libraries and standard process flows

• process simulation and visualization

• process synthesis and technology file extraction

• 3D rendering and animation

• 3D generation from layout and technology files

• layout of arbitrarily shaped objects with design rule checking

• layout synthesis and verification

• fast modeling and verification tools; coupled multi-domain, numerical analysis (e.g. finiteelement method, boundary-element method)

• parasitic extraction to schematic and behavioral views

• macro-model parameter extraction from physical and schematic views

• multi-domain schematic capture (i.e. schematic view showing connectivity between mechanical, electromechanical, thermal, and circuit lumped-parameter elements)

• mixed-signal multi-level multi-domain simulation
 
Current MEMS CAD Tools
Several groups have existing research programs to address the deficiency in MEMS design tools. Examples from the U.S.A. include MEMCAD (M.I.T.)[1] and CAEMEMS (Univ. of Michigan) [2]; examples from Europe include CAPSIM (Catholic Univ. of Leuven, Belgium)[3], SENSOR (Fraunhofer Institute, Germany)[4], and SESES (ETH, Zürich)[5]. These tools involve general numerical analysis of layout and generation of macro-models for simulation. MEMCAD has evolved into a MEMS modeling framework with rapid self-consistent electromechanical 3D numerical simulation. Recent advances have been made in simplifying the input and visualization of 3D models of micromechanical structures from layout using the MEMBUILDER tool[6]. CAEMEMS is a framework in which the users chooses among modules that address specific design
domains. CAEMEMS automatically generates a set of parameterized response surfaces by launching multiple finite-element analyses. IntelliCAD[7] available from IntelliSense Corp. is a commercial MEMS CAD tool with automated 3D modeling from layout and process integrated with numerical analysis. Other commercial tools by Tanner Research[8] cater to the MEMS community by allowing layout of non-manhattan geometry and supplying MEMS technology files with design rule checking. These tools are definite improvements over use of Magic or KIC for layout and stand-alone numerical analysis tools (e.g. ABAQUS, ANSYS, Maxwell). More effort must be poured into fast multi-domain numerical analysis tools specifically tailored for MEMS design. MEMS process simulation and synthesis tools are needed and are being developed[9], but a discussion is outside the scope of this summary.
Current MEMS Design Practices

Current MEMS design practices focus on physical device and process development. A simplified design methodology is shown in Figure 1. Design concepts are implemented in a manual layout.
The performance is then analyzed using numerical analysis tools, usually resulting in iterations on both the layout and the underlying process. The present state-of-the-art in MEMS CAD relies on device-level extraction of macro-models in a limited set of energy domains for behavioral simulation. Current commercial design tools cannot deal with the complex multi-domain architectures that will be necessary to create the next-generation of commercial MEMS. Much future work should focus on creating very fast multi-domain numerical simulation tools to ease both process development and device macro-modeling. However, these numerical tools by themselves may not be practical for rapid iterative design since the physical layout (and perhaps the process) must be changed for each iteration without necessarily knowing what to change to best to improve the device performance.
Currently, a self-consistent electromechanical analysis of a simple device requires many man-hours to create the 3-D geometry and perform a numerical analysis. The manual design cycle in MEMS has not decreased significantly over the past few years since knowledge from previous development efforts cannot be easily reused by future developers.
MEMS Process Services
MEMS covers a broad, evolving spectrum of fabrication processes. This fact makes it very difficult to foresee the ultimate MEMS CAD framework. Our initial efforts at Carnegie Mellon have focussed on design tools for surface-micromachined MEMS, such as polysilicon MEMS built in MCNC's MUMPs process[10], and laminated oxide/aluminum MEMS built using MOSIS followed by an in-house dry-etch release step[11]. There are a several important benefits of making microstructures with stable foundry services such as MUMPs and MOSIS:
• sensor fabrication is fast and reliable, all, or most, fabrication steps are done externally, so research resources can be invested in design, not standard processing,
• the process is repeatable, so circuit and microstructure designs can be re-used,
• devices improve as the process technology improves (e.g. scaling), and
• prototypes can be reproduced at any time.
Because of their planar '2 1/2-D' topology, surface micromechanics is a MEMS technology which lends itself to abstraction in conventional schematic capture tools. Once a working structured design methodology is established for surface-micromachined MEMS, the techniques may be extended to other processes, such as bulk-machined Si or a dissolved-wafer process. The long-term goal is to enable rapid, intuitive exploration and analysis of the design space for complex MEMS.





Nombre: Lenny D. Ramirez C.
Asignatura: CRF
Dirección: http://design.caltech.edu/NSF_MEMS_Workshop/fedder.pdf
Ver blogg: http://lennyramirez-crf.blogspot.com/